Here's how when the process of storage bytes: the diagram below shows only the simplest state, when the memory chips with only one RAM chips, for X86 processors, it by sending the address bus has 22 address coding of binary Numbers, 11 of them are line address, 11 are listed address, this is through the RAM address interface separation, row address decoder (row decoder) will be the first to determine the address, and then the column address decoder (column decoder) will determine the address, so you can determine the position of the only store data, and then the data will be through the RAM data interface the data to the data bus,




It is important to note the RAM in the department store information matrix is not a square, which is the number of rows and columns is not the same number of rows - smaller than the number of columns (DRAM),

The diagram below Outlines a basic SRAM memory chip works, SRAM is "staTI RAM (static random access memory)", named after mainly because when data is placed into the does not disappear (dynamic random access memory with DRAM is different, the DRAM refresh must be within a certain amount of time trying to keep the data stored),




An SRAM cell is generally made up of 4-6 transistor, when the state of an SRAM cell is given 0 or 1, it will continue to maintain this state until the next time you are blessed with new status or power will change or disappear, the speed of SRAM is relatively fast, and will be save electricity, but to store one bit of information need 4-6 transistor manufacturing cost is too high (DRAM as long as 1 transistor can be achieved only),
A SRAM cell - 4-6 transistor - store one bit of information